Power Quality Parameters Calculation Using FPGA Embedded Parallel Processors in Compliance with the IEC 61000-4-30 Standard

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Luiz, Max M.
Duque, Tales F.
Almeida, Afonso H. S.
Kapisch, Eder B.
Silva, Leandro R. M.
Lima, Marcelo A. A.
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This work presents the implementation of a power quality (PQ) parameters calculation system based on the use of parallel processors embedded in field-programmable gate array (FPGA). The novelty in the proposal is that the processors used in the FPGA implementation were developed to be automatically customizable, providing hardware resource optimization. The algorithms implemented in each processor follow the guidelines described in the IEC 61000-4-30 standard, for class A equipment. In order to show the effective operation of the implementation, the system was subjected to a functional simulation, using the ModelSim $$^{\circledR }$$ ® software, from the manufacturer Intel $$^{\circledR }$$ ® . A functional prototype was also developed using a Cyclone $$^{\circledR }$$ ® V FPGA evaluation board, to perform practical tests. The experimental results show that the system is able to calculate all parameters according to the requirements specified by the IEC 61000-4-30 standard for class A devices using minimum hardware resources, such as logic elements, memory and DSP blocks. For further analysis, the calculated parameters are then stored in a database based on PostgreSQL $$^{\circledR }$$ ® platform. In order to enable visualizing and analyzing these results, an interactive visualization panel was developed using the Grafana $$^{\circledR }$$ ® platform.